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Product Brief

NL6000 Knowledge-based Processors

The NL6512, NL6256, and NL6128 devices are knowledge-based processors, which enable network awareness and provide the ability to leverage knowledge about the overall network. These knowledge-based processors provide efficient and rapid decision-making in the processing of packets, or the pieces of information flowing through the network.

The device uses information contained in single or multiple logical databases that store packet classification rules and/or IP addresses. Its primary applications are for packet classification, policy enforcement, state-based routing, packet forwarding, MPLS searches, MAC address searches and/or QoS enforcement for differentiated services in Core, Edge, Metro and Enterprise networking applications. Additionally, the device has extremely low power dissipation. Exact power dissipated depends on the application and speed of operation. It is usually less than 5W in a typical application and 10W in the worst-case at the highest speed of operation. These numbers could vary depending on the exact KBP device.

By providing knowledge-based processing for packets, these knowledge-based processors enable network service providers to offer more advanced functionality at wire-speed performance for the Internet, such as Voice over Internet Protocol, or VoIP, Virtual Private Networks, or VPNs, streaming video and audio, Internet Protocol version Six, or IPv6 and secure financial transactions.

Features

  • NL6512 Organizations:
    • Max of 512K standard 36-bit IPv4 records
    • Dynamically configurable to 72-bit, 144-bit, 288-bit or 576-bit on a per block basis

  • NL6256 Organizations:
    • Max of 256K standard 36-bit IPv4 records
    • Dynamically configurable to 72-bit, 144-bit, 288-bit or 576-bit on a per block basis

  • NL6128 Organizations:
    • Max of 128K standard 36-bit IPv4 records
    • Dynamically configurable to 72-bit, 144-bit, 288-bit or 576-bit on a per block basis

  • 72-bit I/O Data Bus
  • High Speed Mode
  • Clock rates: 200/266/350/400 MHz
  • Sustained single decision rate of 100/133/175/200 million per second for any size data words
  • Sustained two parallel decision rate of 200/266/350/400 million per second for any size data words
  • Each block contains eight independent Configuration Registers
  • Depth cascading scheme for database expansion
  • Parity Checking on I/O and Database
  • IEEE 1149.1 JTAG compatible Boundary Scan
  • Supply Voltages: Core: 1.0V or 1.2V
  • I/Os: 1.5V HSTL or 2.5V SSTL-2 Class I & II
  • Package: 529 FCBGA, 25 mm x 25 mm, 1.00 mm pitch
Diagram

Device Level Block Diagram
Device Level Block Diagram

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